1. Field of the Invention
The present invention relates to a liquid crystal display device used as, for example, a display unit of an electronic apparatus.
2. Description of the Related Art
In recent years, liquid crystal display devices have come to be used for TV sets, monitor devices of personal computers, etc. In these purposes, liquid crystal display devices are required to have a superior viewing angle characteristic that the display screen is viewable from all directions.
However, VA (vertically aligned)-mode liquid crystal display devices, for example, have a problem that a transmittance vs. application voltage characteristic (T-V characteristic) obtained when the display screen is viewed from the direction perpendicular to it (i.e., front direction) is different from that obtained when the display screen is viewed from a oblique direction. More specifically, the color of an image on the display screen looks more whitish when the display screen is viewed from a oblique direction than when it is viewed from the front direction.
Liquid crystal display devices of the TN (twisted nematic) mode, which is a more conventional drive mode, have the same problem. JP-A-2-12 (Reference 1), U.S. Pat. No. 4,840,460 (Reference 2), and Japanese Patent No. 3,076,938 (Reference 3) disclose techniques for solving the above problem of TN-mode liquid crystal display devices. The pixel structure of a basic liquid crystal display device using these known techniques will be described below briefly. A pixel region is formed by, for example, two sub-pixels A and B in which separate pixel electrodes are formed, respectively. The pixel electrode of the one sub-pixel A is connected directly to the source electrode of a thin-film transistor (TFT), but the pixel electrode of the other sub-pixel B is not connected directly to the source electrode. The pixel electrode of the sub-pixel B has a region that coextends with part of a control capacitance electrode extending from the source electrode to a storage capacitor electrode with an insulating film interposed in between, and is connected indirectly to the source electrode via a control capacitance Cc formed in this region.
In the liquid crystal display device having the above pixel structure, a voltage applied to a portion of a liquid crystal layer in the sub-pixel A is different from a voltage applied to a portion of the liquid crystal layer in the sub-pixel B. As a result, distortion in the T-V characteristic is distributed in each pixel. Therefore, the phenomenon that an image looks whitish when viewed from a oblique direction is suppressed and the viewing angle characteristic is improved. This technique will be referred to below as “capacitive coupling HT (halftone/gray scale) technique.”
Whereas References 1-3 describe the above techniques for TN-mode liquid crystal display devices, a more remarkable effect is obtained when the capacitive coupling HT technique is applied to liquid crystal display devices of the VA-mode which has become the mainstream mode in recent years in place of the TN mode.
FIG. 14 shows a one-pixel configuration of a conventional MVA (multi-domain vertical alignment)-type liquid crystal display device employing the capacitive coupling HT technique. As shown in FIG. 14, a TFT substrate of the liquid crystal display device has plural gate bus lines 112 formed on a glass substrate 110 (not shown in FIG. 14) and plural drain bus lines 114 formed so as to cross the gate bus lines 112 with an insulating film 130 (not shown in FIG. 14) interposed in between. Each of TFTs 120, which are formed as switching elements for the respective pixels, is disposed close to the crossing point of the associated set of a gate bus line 112 and a drain bus line 114. A gate electrode 123 of the TFT 120 is electrically connected to the associated gate bus line 112, and its drain electrode 121 is electrically connected to the associated drain bus line 114. A storage capacitor bus line 118 is formed so as to traverse a pixel region defined by the gate bus lines 112 and the drain bus lines 114 and to extend parallel with the gate bus lines 112. A storage capacitor electrode (intermediate electrode) 119 is formed above the storage capacitor bus line 118 with the insulating film 130 interposed in between (the storage capacitor electrodes 119 are provided for the respective pixels). The storage capacitor electrode 119 is electrically connected to a source electrode 122 of the TFT 120 via a control capacitance electrode 125. A storage capacitor Cs is formed between the storage capacitor bus line 118 and the storage capacitor electrode 119.
The pixel region has sub-pixels A and B. The sub-pixel A has a trapezoidal shape, for example, and is disposed at the center (in the vertical direction) closer to the left sideline in the pixel region. The sub-pixel B is disposed so as to occupy portions of the pixel region excluding the sub-pixel A, that is, a top portion, a bottom portion, and a right-hand end portion that is located at the center (in the vertical direction). Each of the sub-pixels A and B is approximately line-symmetrical with respect to the storage capacitor bus line 118. A pixel electrode 116 is formed in the sub-pixel A, and a pixel electrode 117 which is separated from the pixel electrode 116 is formed in the sub-pixel B. The pixel electrode 116 is electrically connected to the storage capacitor electrode 119 and the source electrode 122 of the TFT 120 via a contact hole 124. On the other hand, the pixel electrode 117 is in an electrically floating state. The pixel electrode 117 has a region that coextends with part of the control capacitance electrode 125 with a protective film 131 (not shown in FIG. 14) interposed in between, and the pixel electrode 117 is connected indirectly to the source electrode 122 via a control capacitance Cc formed in this region (capacitive coupling).
A linear slit (electrode-omitted portion) 144 is formed between the pixel electrodes 116 and 117 so as to extend obliquely with respect to the end lines of the pixel region. The slit 144 not only separates the pixel electrodes 116 and 117 but also functions as an alignment restriction structure for restricting the alignment of a liquid crystal 106 (not shown in FIG. 14).
A counter substrate, which is opposed to the TFT substrate via the liquid crystal layer, has a common electrode 141 (not shown in FIG. 14) formed on a glass substrate 111. A liquid crystal capacitance Clc1 is formed between the pixel electrode 116 of the sub-pixel A and the common electrode 141, and a liquid crystal capacitance Clc2 is formed between the pixel electrode 117 of the sub-pixel B and the common electrode 141. Linear projections 142 which function as alignment restriction structures are formed on the common electrode 141 so as to extend parallel with the slit 144. The linear projections 142 are located approximately at the centers of the sub-pixels A and B so as to divide each of the sub-pixels A and B approximately equally into regions having different liquid crystal alignment directions. The control capacitance electrode 125 which connects the source electrode 122 to the storage capacitor electrode 119 overlaps with part of the linear projections 142 when viewed perpendicularly to the substrate surfaces. A light shield film (BM) 145 for shielding an end portion of the pixel region from light is formed in the counter substrate.
Now assume that the TFT 120 has been turned on, whereby a voltage is applied to the pixel electrode 116, that is, a voltage Vpx1 develops across the portion of the liquid crystal layer corresponding to the sub-pixel A. Since the voltage Vpx1 is divided according to the capacitance ratio of the liquid crystal capacitance Clc2 and the control capacitance Cc, a voltage that is applied to the pixel electrode 117 is different from the voltage applied to the pixel electrode 116. A voltage Vpx2 that develops across the portion of the liquid crystal layer corresponding to the sub-pixel B is given byVpx2={Cc/(Clc2+Cc)}×Vpx1.
In this manner, in the liquid crystal display device having the pixel structure of FIG. 14, the voltages Vpx1 and Vpx2 developing across the portions of the liquid crystal layer corresponding to the sub-pixels A and B can be made different from each other in each pixel and hence the viewing angle characteristic is improved.
However, the liquid crystal display device shown in FIG. 14 has the following problems. When a voltage is applied, liquid crystal molecules in the sub-pixel A and those in the sub-pixel B are aligned in opposite directions that are perpendicular to the extension directions of the linear projections 142 with the linear projections 142 as boundaries. However, although liquid crystal molecules in the regions of the linear projections 142 are aligned parallel with the extension directions of the linear projections 142, it is indefinite which side in those directions they are directed to.
FIGS. 15A and 15B show structures of a portion, occupying a top portion of the pixel region, of the sub-pixel B and manners of alignment of liquid crystal molecules 108 in and close to the region of the associated linear projection 142. FIG. 16A is a sectional view of the liquid crystal display panel taken along line X-X in FIG. 15A, and FIG. 16B is a sectional view of the liquid crystal display panel taken along line Y-Y in FIG. 15B. FIGS. 15A and 16A show a state that white is displayed after display of halftone. FIGS. 15B and 16B show a state that white is displayed immediately after display of black (without in-between display of halftone). Whereas FIGS. 15A and 15B and FIGS. 16A and 16B show the manners of alignment of liquid crystal molecules 108 in and close to the region of the linear projection 142 that overlaps with the control capacitance electrode 125, the liquid crystal molecules 108 are aligned in similar manners even in the case where the linear projection 142 does not overlap with the control capacitance electrode 125.
As shown in FIGS. 15A and 16A, in the state that white is displayed after display of halftone, liquid crystal molecules 108 in the region of the linear projection 142 are inclined in one direction indicated by arrows in FIG. 15A, for example, because they are inclined gradually in such a direction as to be rendered stable in terms of energy. On the other hand, as shown in FIGS. 15B and 16B, in the state that white is displayed immediately after display of black, the liquid crystal molecules 108 in the region of the linear projection 142 are inclined toward a position close to the center of the linear projection 142 in its longitudinal direction when viewed from the counter substrate side. That is, there is a tendency that a singular point (s=+1) indicated by mark “•” in FIG. 15B is formed at the above position close to the center of the linear projection 142. As described above, the liquid crystal molecules 108 in and close to the region of the linear projection 142 are aligned in different manners in the state that white is displayed after display of halftone and in the state that white is displayed immediately after display of black. Therefore, in a case that, for example, white is displayed on the entire display screen after display of an image in which halftone and black exist in mixture, the balance of liquid crystal alignment directions of the pixels is lost and an afterimage may be seen depending on the viewing angle. This results in a problem that the display quality of the liquid crystal display device is much lowered.
Incidentally, prescribed capacitances are formed between the drain bus line 114 and the pixel electrodes 116 and 117. Particularly in the configuration in which no thick overcoat layer is formed between the drain bus line 114 and the pixel electrodes 116 and 117, the values of the capacitances formed tend to vary depending on the distances between the drain bus line 114 and the pixel electrodes 116 and 117 as measured parallel with the substrate surface. Therefore, if relative patterning deviations occur in the drain bus line 114 and the pixel electrodes 116 and 117 due to, for example, shot unevenness in divisional exposures, display unevenness that the display characteristics vary from one divisional exposure region to another will be found visually in a manufactured liquid crystal display device. It is therefore necessary to set the end portions of the pixel electrodes 116 and 117 as distant from the drain bus line 114 as possible so that differences in the display characteristics will be less likely found visually even if patterning deviations occur. However, if the end portions of the pixel electrodes 116 and 117 are set away from the drain bus line 114, the region where the pixel electrodes 116 and 117 are formed is made narrow, resulting in a problem that the pixel aperture ratio and the luminance decrease.
Further, a prescribed bonding registration error occurs when the TFT substrate and the counter substrate are bonded to each other. Therefore, it is necessary that the aperture of the BM 145 formed on the counter substrate side be set smaller than the region on the TFT substrate side where the pixel electrodes 116 and 117 are formed. This results in a problem that the pixel aperture ratio and the luminance decrease further.